Something to look forward to: The memory industry is known for its conservative approach, often favoring incremental improvements over revolutionary changes. But as we look toward the end of the ...

Despite concerns about the lack of tools, an unstable process, questionable interconnects, thermal overloads and electrostatic discharge, 3D stacking appears to be making headway. At the very least, ...

AMD has better detailed its next-gen 3D V-Cache stacking technology, where at the exciting but all-digital Hot Chips 33 symposium the company teased its current, and even future 3D stacking ...

(Nanowerk News) At IEDM 2010, imec and its partners presented a study of the stress-induced impact of through-silicon via (TSV) processing on the performance of high-k/metal-gate CMOS transistors and ...

Samsung Electronics has successfully applied 3D stacking technology on a test chip that was made using the 7nm extreme ultraviolet (EUV) chip making process, the company said on Thursday. Dubbed ...