Embedded

Leveraging FPGA and CPLD digital logic to implement analog to digital converters

Designers of digital systems are familiar with implementing the 'leftovers' of their digital design by using FPGAs and CPLDs to glue together various processors, memories, and standard function ...
EDN

Resets in FPGA & ASIC control and data paths

Reset is an important mechanism to bring a digital system into a known state. The need for reset is governed by the system design and application, and various data and control paths are designed to ...
Design-Reuse

FPGA based Complex System Designs: Methodology and Techniques

Today platform-FPGAs are fabricated in nanometer technologies with multi-million gate densities; hard/soft macros such as embedded processors, RAMs, multipliers, DSP blocks, analog cells and high ...
Design-Reuse

FPGA prototyping of complex SoCs: Partitioning and Timing Closure Challenges with Solutions

In the nanometer era, complex SoCs have higher risk of re-spins. Undoubtedly FPGA prototyping is the right way of pre-silicon SoC validation, accelerate system software development and to meet time-to ...
Electronic Design

Compact 16-nm FPGA Loads Up on Programmable Logic

The flagship offering in Lattice’s Avant-E family fits 500,000 logic units into a 15- x 13-mm package. Lattice Semiconductor’s new Avant architecture is purpose-built to extend the company’s focus on ...
Hackaday

Who Could Possibly Need An FPGA With 9M Logic Cells And 35B Transistors?

Xilinx recently announced the Virtex UltraScale+ VU19P FPGA. Of course, FPGA companies announce new chips every day. The reason this one caught our attention is the size of it: nearly 9 million logic ...
The Next Platform

Where The FPGA Hits The Server Road For Inference Acceleration

There are an increasing number of ways to do machine learning inference in the datacenter, but one of the increasingly popular means of running inference workloads is the combination of traditional ...