Microchip has developed a single-I/O bus UNI/O EEPROM devices in miniature, wafer-level chip-scale and TO-92 packages, in addition to the 3-pin SOT-23 package. Measuring 0.85 mm x 1.38 mm, the ...

If you thought a chip like AMD's MI300A was big at 146 billion transistors, you ain't seen nothing yet. AI company Cerebras announced its third-generation AI chip, CS-3, a "wafer-scale" silicon ...

Over the past year, companies like Cerebras have made headlines for their use of wafer-scale processing. TSMC wants to grow this area of its business and plans to build out its InFO_SoW (Integrated ...

The promise of a new type of computer chip that could reshape the future of artificial intelligence and be more environmentally friendly is explored in a technology review paper published by UC ...

At the end of January, Advanced Chip Engineering Technology (ACE) will begin applying its WLCSP (wafer-level chip-scale package) burn-in, packaging and testing solution to 256Mbit DDR (double data ...

'Chip binning' is supposed to be the process of testing newly manufactured silicon to see how many of the important bits work and how high the thing will clock. But TSMC seems to be taking the notion ...